1. Field of the Invention
The present invention relates to charge pump circuits and methods and, more particularly, to charge pump circuits and methods for use with low supply voltages.
2. Description of the Related Art
To reduce power consumption and extend battery life, the integrated circuitry of many personal computers run at low voltage levels. While running at a low voltage solves many power consumption problems, certain computer functions require a high voltage. For example, electrically erasable programmable read only memories (EEPROMs) require a high voltage to alter or erase the stored data. When the available power supply cannot provide the high voltage, the memory device will typically include a charge pump circuit to boost the power supply voltage to the higher value.
FIG. 1 is a circuit diagram of a conventional charge pump circuit 100. As shown in FIG. 1, the charge pump circuit 100 includes n-type metal oxide semiconductor field effect transistors (MOSFETs) T1 to T5 and capacitors C1 to C4 and Co. Transistors T1 to T5 are connected with their source and drain terminals in series between a voltage supply Vs and an output terminal Vo. In addition, transistors T1 to T5 are configured as diodes by the gate terminal of each transistor being tied to its drain terminal, while each transistor's body terminal is connected to ground.
Capacitors C1 to C4 are each connected to one of two non-overlapping clock signals .phi.1 and .phi.2, provided by clock sources not shown. Specifically, clock signal .phi.1 is connected to capacitors C1 and C3, while clock signal .phi.2 is connected to capacitors C2 and C4. The other ends of capacitors C1 to C4 are connected to the source terminals of transistors T1 to T4, respectively. Capacitor Co, on the other hand, is connected between the source terminal of transistor T5 and ground. FIG. 2 is a timing diagram showing the waveforms of clock signals .phi.1 and .phi.2. As shown in FIG. 2, clock signals .phi.1 and .phi.2 are square wave signals, opposite in phase, and which vary between a low value of ground and a high value of Vs.
When clock signal .phi.1 is low, transistor T1 will be turned on because its gate voltage will be substantially higher than its source voltage. As transistor T1 turns on, capacitor C1 charges to the value of Vs less a threshold drop Vt across transistor T1. Thereafter, when clock signal .phi.1 rises, the voltage at the drain terminal of transistor T2 is boosted up to 2Vs-Vt by capacitor C1. This turns off transistor T1 and turns on transistor T2, causing capacitor C2 to charge to a value of 2Vs-2Vt. When clock signal .phi.1 goes low again, the voltage at the drain terminal of transistor T3 is boosted to 3Vs-2Vt by capacitor C2, thereby turning on transistor T3. This, in turn, causes the voltage on capacitor C3 to rise to the level of 3Vs-3Vt.
This pattern of charging continues with a boosted output voltage Vo eventually appearing across capacitor Co at the output terminal. The voltage at the output terminal will ultimately approach a value represented by the equation [(N+1).times.(Vs-Vt)], where N is the number of stages of charge pump circuit 100.
Charge pump circuit 100, however, suffers from a number of problems when used with a low supply voltage. For instance, although charge pump circuit 100 can achieve a high output voltage from a low supply voltage Vs by increasing the number of cascaded stages, this necessarily decreases the charging speed of circuit 100. In addition, the voltage output of charge pump circuit 100 is limited by what is known as body effect. This effect occurs because the transistor source terminals of circuit 100 cannot be tied to the body terminal since the source must be allowed to rise above the supply voltage Vs, as described above. The resulting large source-to-body voltage gives rise to a body effect, which causes the threshold voltage Vt to increase, and thereby decrease the value of Vo.
Therefore, it is desired to have a charge pump circuit that can provide large positive or negative output voltages when used with a low supply voltage.